摘要
A new device is introduced to solve the problem existing in grating displacement transducers i.e. that the traditional simulative subdivision method involves complex structures and easily disturbed. CPLD chips have been used to design a new subdivision module and Verilog HDL used to realize modules of four sub-frequency, direction judgment and counting. It has been proved that the new design method is of shorter development cycle, highly integrated, modular, and easily revise.
| 源语言 | 英语 |
|---|---|
| 页(从-至) | 1073-1076 |
| 页数 | 4 |
| 期刊 | Beijing Ligong Daxue Xuebao/Transaction of Beijing Institute of Technology |
| 卷 | 26 |
| 期 | 12 |
| 出版状态 | 已出版 - 12月 2006 |
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