TY - JOUR
T1 - A novel phase-locked loop based on frequency detector and initial phase angle detector
AU - Wang, Liang
AU - Jiang, Qirong
AU - Hong, Lucheng
AU - Zhang, Chunpeng
AU - Wei, Yingdong
PY - 2013
Y1 - 2013
N2 - This paper proposes a new three-phase software phase-locked loop (PLL) that operates fast and accurately in unbalanced, polluted, and frequency deviating circumstances. The proposed PLL consists of a frequency detector and an initial phase angle detector. In the synchronous reference frame, the initial phase angle detector tracks a ramp phase angle, which is generated from frequency deviation of the inputs, with steady error. This detection error is utilized to estimate the actual grid frequency. Frequency adaptive moving average filters (MAFs) are applied in this new PLL to eliminate noises, harmonics, and negative sequence components. In this paper, the effect of discrete sampling on the MAFs is analyzed, and a linear interpolation is employed to enhance the performances of the MAFs. The stability of the proposed PLL is also analyzed, a sufficient stability condition is identified, and the design procedures of the control parameters are also presented. Simulations and experiments verify the performances of the novel PLL.
AB - This paper proposes a new three-phase software phase-locked loop (PLL) that operates fast and accurately in unbalanced, polluted, and frequency deviating circumstances. The proposed PLL consists of a frequency detector and an initial phase angle detector. In the synchronous reference frame, the initial phase angle detector tracks a ramp phase angle, which is generated from frequency deviation of the inputs, with steady error. This detection error is utilized to estimate the actual grid frequency. Frequency adaptive moving average filters (MAFs) are applied in this new PLL to eliminate noises, harmonics, and negative sequence components. In this paper, the effect of discrete sampling on the MAFs is analyzed, and a linear interpolation is employed to enhance the performances of the MAFs. The stability of the proposed PLL is also analyzed, a sufficient stability condition is identified, and the design procedures of the control parameters are also presented. Simulations and experiments verify the performances of the novel PLL.
KW - Digital filter
KW - grid synchronization
KW - moving average filter (MAF)
KW - phase-locked loop (PLL)
UR - https://www.scopus.com/pages/publications/84875159508
U2 - 10.1109/TPEL.2012.2236848
DO - 10.1109/TPEL.2012.2236848
M3 - Article
AN - SCOPUS:84875159508
SN - 0885-8993
VL - 28
SP - 4538
EP - 4549
JO - IEEE Transactions on Power Electronics
JF - IEEE Transactions on Power Electronics
IS - 10
M1 - 6397623
ER -