TY - GEN
T1 - A Hierarchical Compilation Method for Programmable Analog-to-Digital Converter Arrays
AU - Zhang, Zhishuai
AU - Huang, Siyu
AU - Zhong, Yi
AU - Sun, Nan
AU - Jie, Lu
N1 - Publisher Copyright:
© 2025 IEEE.
PY - 2025
Y1 - 2025
N2 - This paper introduces a hierarchical compilation approach for multi-channel reconfigurable analog-to-digital converter (ADC) systems, motivated by the need for highly flexible and scalable solutions in programmable converter arrays (PCAs). Unlike existing methods that mainly rely on manual circuitlevel adjustments with high complexity, limited scalability, and low flexibility, this method provides a structured and scalable hierarchical mapping scheme. This facilitates flexible and efficient configuration by integrating software and hardware design, making it highly suitable for automation and future expansion. It paves the way for the automatic synthesis, optimization and future expansion of PCAs.
AB - This paper introduces a hierarchical compilation approach for multi-channel reconfigurable analog-to-digital converter (ADC) systems, motivated by the need for highly flexible and scalable solutions in programmable converter arrays (PCAs). Unlike existing methods that mainly rely on manual circuitlevel adjustments with high complexity, limited scalability, and low flexibility, this method provides a structured and scalable hierarchical mapping scheme. This facilitates flexible and efficient configuration by integrating software and hardware design, making it highly suitable for automation and future expansion. It paves the way for the automatic synthesis, optimization and future expansion of PCAs.
KW - Analog-to-digital converter
KW - hierarchical representation
KW - programmable arrays
KW - reconfigurability
KW - timing matrix
UR - https://www.scopus.com/pages/publications/105010653432
U2 - 10.1109/ISCAS56072.2025.11042940
DO - 10.1109/ISCAS56072.2025.11042940
M3 - Conference contribution
AN - SCOPUS:105010653432
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - ISCAS 2025 - IEEE International Symposium on Circuits and Systems, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2025 IEEE International Symposium on Circuits and Systems, ISCAS 2025
Y2 - 25 May 2025 through 28 May 2025
ER -