TY - JOUR
T1 - A 6.2 - 38-GHz Image-Reject Receiver With Hybrid LO Generation and Linear-in-dB Gain Control
AU - Liu, Xuzhi
AU - Liu, Zicheng
AU - Han, Fang
AU - Qi, Quanwen
AU - Li, Xiaoran
AU - Wang, Xinghua
AU - Dang, Hua
AU - Chen, Zhiming
N1 - Publisher Copyright:
© 2026 IEEE.
PY - 2026/9/1
Y1 - 2026/9/1
N2 - This article presents a 6.2-38-GHz dual-channel receiver (RX) based on a configurable Hartley architecture, featuring sideband selection and achieving 28-49 dB calibration-free full-band image rejection ratio (IRR). The RX supports low-IF and zero-IF operation and features a 3.5-GHz bi-directional IF interface for flexible off-chip filtering. A pseudo-exponential (PE) digital control technique is introduced in the low-noise variable gain amplifier (LN-VGA) to realize linear-in-dB characteristics over a 14-dB range, while resistive compensation is employed to reduce phase variation across the wide bandwidth. Quadrature LO signals are derived from a single 19-34.5-GHz clock via a hybrid generation scheme combining a transformer-based poly-phase network (TPPN) and a divide-by-2 divider, achieving I/Q amplitude and phase mismatches within ±0.2 dB and ±0.5° across 8-34.5 GHz. To handle signal attenuation in the LO distribution chain, switchable current injection is introduced in the frequency divider to enhance input sensitivity, extending the locking range to 30 GHz. Fabricated in a 45-nm CMOS SOI technology, the RX demonstrates a BW3dB of 6.2-38 GHz, while the required LO bandwidth is 15.5 GHz. In low-IF mode, the peak conversion gain (CG) is 43 dB, and the NF is 2.4-4.9 dB. In zero-IF mode, the peak gain reaches 75 dB, with a gain control range of 81 dB with a 2-dB step.
AB - This article presents a 6.2-38-GHz dual-channel receiver (RX) based on a configurable Hartley architecture, featuring sideband selection and achieving 28-49 dB calibration-free full-band image rejection ratio (IRR). The RX supports low-IF and zero-IF operation and features a 3.5-GHz bi-directional IF interface for flexible off-chip filtering. A pseudo-exponential (PE) digital control technique is introduced in the low-noise variable gain amplifier (LN-VGA) to realize linear-in-dB characteristics over a 14-dB range, while resistive compensation is employed to reduce phase variation across the wide bandwidth. Quadrature LO signals are derived from a single 19-34.5-GHz clock via a hybrid generation scheme combining a transformer-based poly-phase network (TPPN) and a divide-by-2 divider, achieving I/Q amplitude and phase mismatches within ±0.2 dB and ±0.5° across 8-34.5 GHz. To handle signal attenuation in the LO distribution chain, switchable current injection is introduced in the frequency divider to enhance input sensitivity, extending the locking range to 30 GHz. Fabricated in a 45-nm CMOS SOI technology, the RX demonstrates a BW3dB of 6.2-38 GHz, while the required LO bandwidth is 15.5 GHz. In low-IF mode, the peak conversion gain (CG) is 43 dB, and the NF is 2.4-4.9 dB. In zero-IF mode, the peak gain reaches 75 dB, with a gain control range of 81 dB with a 2-dB step.
KW - I/Q generation
KW - Image rejection
KW - low noise variable-gain amplifier (LN-VGA)
KW - poly-phase
KW - receiver (RX)
KW - wideband
UR - https://www.scopus.com/pages/publications/105036237291
U2 - 10.1109/TCSI.2026.3682667
DO - 10.1109/TCSI.2026.3682667
M3 - Article
AN - SCOPUS:105036237291
SN - 1549-8328
VL - 73
SP - 5954
EP - 5966
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 9
ER -