@inproceedings{1c5f3467b800418ea6d72a043733b15a,
title = "A 100MHz Digital Down Converter with modified FIR filter for wideband Software-Defined Radios",
abstract = "Digital Down Converter is one of the key technologies in Software Defined Radio. In Digital Down Converter how to realize a high-speed, high-order FIR filter is an interesting problem. This paper proposes a modified Distributed Arithmetic, in which speed is improved and memory is saved compared with the traditional Distributed Arithmetic. The presented FIR filter based on the modified Distributed Arithmetic has been implemented in the form of ASIC which was fabricated in a SMIC 0.13μm CMOS process. The chip's sample rate can reach 10MSPS in the 80MHz system clock.",
keywords = "DDC, FIR filter, Modified distributed arithmetic",
author = "Liu, \{Hua Ming\} and Li, \{Guang Jun\} and Bo Yan and Qiang Li",
year = "2010",
doi = "10.1109/ICEIE.2010.5559748",
language = "English",
isbn = "9781424476800",
series = "ICEIE 2010 - 2010 International Conference on Electronics and Information Engineering, Proceedings",
pages = "V2540--V2544",
booktitle = "ICEIE 2010 - 2010 International Conference on Electronics and Information Engineering, Proceedings",
note = "2010 International Conference on Electronics and Information Engineering, ICEIE 2010 ; Conference date: 01-08-2010 Through 03-08-2010",
}