@inproceedings{47bc7a8e56204e78a0fb01c4954e726f,
title = "A 0.021mm292dB-SNDR 88kHz-BW Incremental Zoom ADC with 2nd-order RT-DEM and Quiet Chopping",
abstract = "This work proposes a continuous-time incremental zoom ADC with an on-chip 2 n d -order decimation filter. It adopts a 2 n d -order RT-DEM technique to eliminate DAC mismatch with a customized bidirectional circular shift register, and the quiet chopping technique to achieve high input impedance. The prototype ADC presents 91.6dB SNDR over an 88kHz bandwidth, consuming only 437 μ W of power.",
keywords = "Continuous-time delta-sigma modulator (CTDSM), Quiet chopping, Real-time dynamic element matching (RT-DEM)",
author = "Chaoyang Xing and Yi Zhong and Nan Sun and Lu Jie",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 49th IEEE European Solid State Circuits Conference, ESSCIRC 2023 ; Conference date: 11-09-2023 Through 14-09-2023",
year = "2023",
doi = "10.1109/ESSCIRC59616.2023.10268741",
language = "English",
series = "European Solid-State Circuits Conference",
publisher = "IEEE Computer Society",
pages = "293--296",
booktitle = "ESSCIRC 2023 - IEEE 49th European Solid State Circuits Conference",
address = "United States",
}