A 0.0035-mm² 86-dB-SNR 1.25-MHz-BW Noise-Shaping SAR ADC Enabling kT/C Noise Shaping

This work presents a compact second-order noise shaping successive approximation register (NS-SAR) analog-to-digital converter (ADC) featuring a novel kT/C noise shaping technique. The proposed kT/C noise shaping technique selectively suppresses kT/C noise within the signal bandwidth of an oversampled SAR ADC. It avoids using a wideband noise extraction amplifier as in the conventional kT/C noise-canceling method. Thus, it achieves a greatly reduced input sampling capacitance, high power efficiency, and low input noise penalty. A prototype ADC implemented in a 28-nm process achieves 85.8 dB signal-to-noise-and-distortion ratio (SNDR) across a 1.25 MHz bandwidth with sampling capacitors of only 150 fF and off-chip mismatch calibration. The power consumption at 40 MS/s is 0.9 mW, resulting in a Schreier figure of merit (FoM_S) of 177.2 dB. The ADC occupies an area of 0.0035-mm², which is the smallest among all published ADCs with over 70 dB SNDR with calibration.