Two-dimensional force-directed cluster scheduling algorithm for the clustered VLIW architecture

Large numbers of instructions per-cycle (IPC) degrades processor performance due to increased data transfer between clusters in clustered very long instruction word (VLIW) processor architectures. This paper presents a two-dimensional force-directed cluster assignment algorithm that accounts the scheduling in all the cycles when assigning clusters for operations, so the operations are balanced on all the clusters which reduces the scheduling length. The time complexity for the algorithm is only O (n²), which is better than the PCC and simulated annealing algorithm. Test results indicate that the algorithm's performance is better than that of the unified assignment and scheduling (UAS) algorithm for scheduling in the clustered VLIW architecture.