TY - JOUR
T1 - Theoretical and experimental investigations of the CMOS compatible Pirani gauges with a temperature compensation model
AU - Xu, Shizhen
AU - Yang, Gai
AU - Chen, Junfu
AU - Jiao, Rui
AU - Wang, Ruoqin
AU - Yu, Hongyu
AU - Xie, Huikai
AU - Wang, Xiaoyi
N1 - Publisher Copyright:
© The Author(s) 2025.
PY - 2025/12
Y1 - 2025/12
N2 - In this article, a CMOS-compatible Pirani vacuum gauge was proposed featuring enhanced sensitivity, lower detection limit, and high-temperature stability, achieved through the implementation of a surface micromachining method coupled with a temperature compensation strategy. To improve performance, a T-type device with a 1 µm gap was fabricated resulting in an average sensitivity of 1.10 V/lgPa, which was 2.89 times larger than that (0.38 V/lgPa) of a L-type device with a 100 µm gap. Additionally, FEA simulations were conducted, analyzing the influence of heater temperature on sensitivity and the attenuation of sensitivity across varying ambient temperatures. A semi-empirical theoretical mode was derived for performance prediction, demonstrating strong alignment with experimental results, underscoring its effectiveness in compensating for sensitivity attenuation. Building on the foundation, the device’s performance under different ambient temperatures was characterized and effectively compensated in two distinct operational modes: constant temperature mode and constant temperature difference mode (the whole range temperature compensation error can be controlled within 2.5%). Finally, the short-time stability (variation level is approximately 1 mV), noise floor (Vrms=384 μV) and detection limit (0.07 Pa @1 Hz) of the device were characterized, confirming its suitability for practical implementation. (Figure presented.)
AB - In this article, a CMOS-compatible Pirani vacuum gauge was proposed featuring enhanced sensitivity, lower detection limit, and high-temperature stability, achieved through the implementation of a surface micromachining method coupled with a temperature compensation strategy. To improve performance, a T-type device with a 1 µm gap was fabricated resulting in an average sensitivity of 1.10 V/lgPa, which was 2.89 times larger than that (0.38 V/lgPa) of a L-type device with a 100 µm gap. Additionally, FEA simulations were conducted, analyzing the influence of heater temperature on sensitivity and the attenuation of sensitivity across varying ambient temperatures. A semi-empirical theoretical mode was derived for performance prediction, demonstrating strong alignment with experimental results, underscoring its effectiveness in compensating for sensitivity attenuation. Building on the foundation, the device’s performance under different ambient temperatures was characterized and effectively compensated in two distinct operational modes: constant temperature mode and constant temperature difference mode (the whole range temperature compensation error can be controlled within 2.5%). Finally, the short-time stability (variation level is approximately 1 mV), noise floor (Vrms=384 μV) and detection limit (0.07 Pa @1 Hz) of the device were characterized, confirming its suitability for practical implementation. (Figure presented.)
UR - http://www.scopus.com/inward/record.url?scp=85218198006&partnerID=8YFLogxK
U2 - 10.1038/s41378-024-00832-z
DO - 10.1038/s41378-024-00832-z
M3 - Article
AN - SCOPUS:85218198006
SN - 2055-7434
VL - 11
JO - Microsystems and Nanoengineering
JF - Microsystems and Nanoengineering
IS - 1
M1 - 21
ER -