The design of parallel neural network target recogniton system with many DSP

Shuang Qiao; Ting Fa Xu; Jian Zhong Song; Zhi Hong Dong

doi:10.1109/ICMLC.2003.1260117

The design of parallel neural network target recogniton system with many DSP

Shuang Qiao^*
, Ting Fa Xu
, Jian Zhong Song
, Zhi Hong Dong

^*Corresponding author for this work

CAS - Changchun Institute of Optics Fine Mechanics and Physics
Northeast Normal University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper introduces a virtual neural network system that uses many parallel DSP to realize more targets recognition. This system is made up of DSP image capture unit, 3 parallel neural network recognition units, mobile characteristics calculation unit, syncretism logic, and corresponding software. Practical tests indicate that the statistical recognition ratio of 9 targets is more than 90% and the result can be given in 2.8ms. So this system meets the real time demand.

Original language	English
Title of host publication	2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	3130-3133
Number of pages	4
ISBN (Print)	0780378652, 9780780378650
DOIs	https://doi.org/10.1109/ICMLC.2003.1260117
Publication status	Published - 2003
Externally published	Yes
Event	2nd International Conference on Machine Learning and Cybernetics, ICMLC 2003 - Xi'an, China Duration: 2 Nov 2003 → 5 Nov 2003

Publication series

Name	International Conference on Machine Learning and Cybernetics
Volume	5

Conference

Conference	2nd International Conference on Machine Learning and Cybernetics, ICMLC 2003
Country/Territory	China
City	Xi'an
Period	2/11/03 → 5/11/03

Keywords

Neural Network
Parallel Structure
Target Recognition

Access to Document

10.1109/ICMLC.2003.1260117

Cite this

Qiao, S., Xu, T. F., Song, J. Z., & Dong, Z. H. (2003). The design of parallel neural network target recogniton system with many DSP. In 2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003 (pp. 3130-3133). (International Conference on Machine Learning and Cybernetics; Vol. 5). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICMLC.2003.1260117

@inproceedings{2b120b3b417649149e0812574cd86b2a,

title = "The design of parallel neural network target recogniton system with many DSP",

abstract = "This paper introduces a virtual neural network system that uses many parallel DSP to realize more targets recognition. This system is made up of DSP image capture unit, 3 parallel neural network recognition units, mobile characteristics calculation unit, syncretism logic, and corresponding software. Practical tests indicate that the statistical recognition ratio of 9 targets is more than 90\% and the result can be given in 2.8ms. So this system meets the real time demand.",

keywords = "Neural Network, Parallel Structure, Target Recognition",

author = "Shuang Qiao and Xu, \{Ting Fa\} and Song, \{Jian Zhong\} and Dong, \{Zhi Hong\}",

year = "2003",

doi = "10.1109/ICMLC.2003.1260117",

language = "English",

isbn = "0780378652",

series = "International Conference on Machine Learning and Cybernetics",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "3130--3133",

booktitle = "2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003",

address = "United States",

note = "2nd International Conference on Machine Learning and Cybernetics, ICMLC 2003 ; Conference date: 02-11-2003 Through 05-11-2003",

}

Qiao, S, Xu, TF, Song, JZ & Dong, ZH 2003, The design of parallel neural network target recogniton system with many DSP. in 2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003. International Conference on Machine Learning and Cybernetics, vol. 5, Institute of Electrical and Electronics Engineers Inc., pp. 3130-3133, 2nd International Conference on Machine Learning and Cybernetics, ICMLC 2003, Xi'an, China, 2/11/03. https://doi.org/10.1109/ICMLC.2003.1260117

The design of parallel neural network target recogniton system with many DSP. / Qiao, Shuang; Xu, Ting Fa; Song, Jian Zhong et al.
2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. 3130-3133 (International Conference on Machine Learning and Cybernetics; Vol. 5).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - The design of parallel neural network target recogniton system with many DSP

AU - Qiao, Shuang

AU - Xu, Ting Fa

AU - Song, Jian Zhong

AU - Dong, Zhi Hong

PY - 2003

Y1 - 2003

N2 - This paper introduces a virtual neural network system that uses many parallel DSP to realize more targets recognition. This system is made up of DSP image capture unit, 3 parallel neural network recognition units, mobile characteristics calculation unit, syncretism logic, and corresponding software. Practical tests indicate that the statistical recognition ratio of 9 targets is more than 90% and the result can be given in 2.8ms. So this system meets the real time demand.

AB - This paper introduces a virtual neural network system that uses many parallel DSP to realize more targets recognition. This system is made up of DSP image capture unit, 3 parallel neural network recognition units, mobile characteristics calculation unit, syncretism logic, and corresponding software. Practical tests indicate that the statistical recognition ratio of 9 targets is more than 90% and the result can be given in 2.8ms. So this system meets the real time demand.

KW - Neural Network

KW - Parallel Structure

KW - Target Recognition

UR - https://www.scopus.com/pages/publications/1542366738

U2 - 10.1109/ICMLC.2003.1260117

DO - 10.1109/ICMLC.2003.1260117

M3 - Conference contribution

AN - SCOPUS:1542366738

SN - 0780378652

SN - 9780780378650

T3 - International Conference on Machine Learning and Cybernetics

SP - 3130

EP - 3133

BT - 2003 International Conference on Machine Learning and Cybernetics, ICMLC 2003

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2nd International Conference on Machine Learning and Cybernetics, ICMLC 2003

Y2 - 2 November 2003 through 5 November 2003

ER -

The design of parallel neural network target recogniton system with many DSP

Abstract

Publication series

Conference

Keywords

Access to Document

Other files and links

Fingerprint

Cite this