System Design for On-Board Multi-Mission Compatibility of Spaceborne SAR

To meet the real-time, multi-task processing demands of spaceborne synthetic aperture radar (SAR) systems under limited onboard resources, this paper presents a configurable field-programmable gate array (FPGA) architecture that supports both water body and oil spill detection. First, an efficient computing engine partitioning method at coarse and fine granularities is proposed. The operations of the water body and oil spill detection algorithms are clustered and analyzed at two levels, and both general-purpose and specialized computing engines are designed to minimize resource usage. Second, a high-reuse storage optimization strategy is introduced. Based on the data buffering cycle, a shared on-chip memory is designed to minimize storage resource consumption. Building upon these foundations, a software and hardware co-programmable efficient processing system is developed, successfully mapping both detection algorithms onto the FPGA. Finally, the effectiveness of the proposed architecture is confirmed through experimentation, and processing performance is analyzed. Processing times for a 16K × 16K water body scene and a 16K × 16K oil spill scene are 15 s and 13 s, respectively, at a clock frequency of 100 MHz, meeting the real-time multi-task processing requirements of on-board operations.