TY - GEN
T1 - Real time signal processing system of digital array radar
AU - Liu, Feng
AU - Yuan, Haipeng
AU - Long, Teng
PY - 2009
Y1 - 2009
N2 - This paper focuses on the cascaded two-level DBF structures of digital array radar processing system. A real time processing platform is designed and implemented, including hardware system establishing and algorithm mapping, based on general purpose COTS modules. The signal processing system is scalable, restructurable, could satisfy the processing requirement of digital array radar. (4 pages).
AB - This paper focuses on the cascaded two-level DBF structures of digital array radar processing system. A real time processing platform is designed and implemented, including hardware system establishing and algorithm mapping, based on general purpose COTS modules. The signal processing system is scalable, restructurable, could satisfy the processing requirement of digital array radar. (4 pages).
KW - DSP
KW - Digital Array Radar
KW - Real-time Signal Processor
UR - http://www.scopus.com/inward/record.url?scp=70350191681&partnerID=8YFLogxK
U2 - 10.1049/cp.2009.0484
DO - 10.1049/cp.2009.0484
M3 - Conference contribution
AN - SCOPUS:70350191681
SN - 9781849190107
T3 - IET Conference Publications
BT - IET International Radar Conference 2009
T2 - IET International Radar Conference 2009
Y2 - 20 April 2009 through 22 April 2009
ER -