TY - GEN
T1 - PA linearization using multi-stage look-up-table predistorter with optimal linear weighted delay
AU - Yang, Zhao
AU - Zhang, Qin
AU - Xia, Gaofeng
AU - Liu, Jiong
PY - 2012
Y1 - 2012
N2 - A digital predistortion linearization algorithm using multi-stage look-up-table (LUT) predistorter with optimal linear weighted delay is proposed for memory power amplifiers (PA). In order to find the optimal linear delay weight under the constraint of fewer stages of LUTs which is imposed by the limited hardware resources, minimum normalized mean-square error (MNMSE) is chosen as the criterion. The new algorithm adopts the reference model indirect learning architecture, and updates its LUTs using LMS algorithm without training sequences. The multi-stage LUT predistorter has the simple structure of finite-impulse-response filter, which involves less computational complexity and is easy for hardware implementation. By evaluating optimal linear delay weight, the new algorithm achieves better linearization results. Excellent performance of the new algorithm is validated by results from hardware tests.
AB - A digital predistortion linearization algorithm using multi-stage look-up-table (LUT) predistorter with optimal linear weighted delay is proposed for memory power amplifiers (PA). In order to find the optimal linear delay weight under the constraint of fewer stages of LUTs which is imposed by the limited hardware resources, minimum normalized mean-square error (MNMSE) is chosen as the criterion. The new algorithm adopts the reference model indirect learning architecture, and updates its LUTs using LMS algorithm without training sequences. The multi-stage LUT predistorter has the simple structure of finite-impulse-response filter, which involves less computational complexity and is easy for hardware implementation. By evaluating optimal linear delay weight, the new algorithm achieves better linearization results. Excellent performance of the new algorithm is validated by results from hardware tests.
KW - Digital predistortion
KW - Look-up-table
KW - Memory effect
KW - Power amplifier linearization
KW - Weighted delay
UR - http://www.scopus.com/inward/record.url?scp=84876490509&partnerID=8YFLogxK
U2 - 10.1109/ICoSP.2012.6491529
DO - 10.1109/ICoSP.2012.6491529
M3 - Conference contribution
AN - SCOPUS:84876490509
SN - 9781467321945
T3 - International Conference on Signal Processing Proceedings, ICSP
SP - 47
EP - 51
BT - ICSP 2012 - 2012 11th International Conference on Signal Processing, Proceedings
T2 - 2012 11th International Conference on Signal Processing, ICSP 2012
Y2 - 21 October 2012 through 25 October 2012
ER -