On Improving Performance and Energy Efficiency for Register-File Connected Clustered VLIW Architectures for Embedded System Usage

Traditionally, the register allocation phase for clustered very long instruction words (VLIW) architecture is implemented independently from instruction scheduling and cluster assignment. However, independently performing register allocation, scheduling and cluster assignment could have negative effect on the other phases. The research of this paper is focused on register-file connected clustered VLIW (RFCC VLIW) architecture. In RFCC VLIW architecture, the number of access ports to the global register file from each cluster and the number of registers in the global register file are both limited, due to the consideration of limited chip area of embedded systems. Thus, the distribution of inter-cluster data transferring must be carefully arranged; otherwise, there will be conflicts, which harm the performance and energy consumption. This paper proposes an algorithm to take register pressure into consideration while performing instruction scheduling and cluster assignment, so as to optimize performance and energy for embedded systems with RFCC VLIW architecture. The result shows that our algorithm can significantly reduce the penalty of performance and energy consumption due to register pressure of global register file.