TY - JOUR
T1 - MULTI-CHANNEL HBM PARALLEL STORAGE CONTROLLER FOR SPACEBORNE SAR IMAGING SYSTEM
AU - Zhang, Ao
AU - Zhou, Jiaping
AU - Li, Yongrui
AU - Zhang, Zhihan
AU - Xu, Ming
AU - Yang, Zhu
AU - Xie, Yizhuang
N1 - Publisher Copyright:
© The Institution of Engineering & Technology 2023.
PY - 2023
Y1 - 2023
N2 - With the continuous development of remote sensing technology, Spaceborne Synthetic Aperture Radar (SAR) is gradually evolving towards acquiring information in space and real-time on-board processing. Therefore, the real-time processing requirements for its imaging processing system are becoming increasingly stringent. The data bandwidth of the existing imaging processing systems cannot meet the high real-time processing demands. To address the aforementioned issues and satisfy the high bandwidth requirements of on-board SAR imaging processing systems, this paper proposes a multi-channel High Bandwidth Memory(HBM) parallel storage controller for Spaceborne SAR. It enables parallel data reading and writing for 16 data channels. The overall hardware design is based on the Virtex UltraScale+ HBM VCU128 FPGA platform. Through testing and verification, under the same clock frequency, the data bandwidth has been improved by approximately 10 times compared to existing solutions, achieving around 80GB/s of ultra-high bandwidth data read-write capability. Additionally, this design solution holds significant potential for further development, making it of considerable value and significance for the design of on-board SAR imaging processing systems.
AB - With the continuous development of remote sensing technology, Spaceborne Synthetic Aperture Radar (SAR) is gradually evolving towards acquiring information in space and real-time on-board processing. Therefore, the real-time processing requirements for its imaging processing system are becoming increasingly stringent. The data bandwidth of the existing imaging processing systems cannot meet the high real-time processing demands. To address the aforementioned issues and satisfy the high bandwidth requirements of on-board SAR imaging processing systems, this paper proposes a multi-channel High Bandwidth Memory(HBM) parallel storage controller for Spaceborne SAR. It enables parallel data reading and writing for 16 data channels. The overall hardware design is based on the Virtex UltraScale+ HBM VCU128 FPGA platform. Through testing and verification, under the same clock frequency, the data bandwidth has been improved by approximately 10 times compared to existing solutions, achieving around 80GB/s of ultra-high bandwidth data read-write capability. Additionally, this design solution holds significant potential for further development, making it of considerable value and significance for the design of on-board SAR imaging processing systems.
KW - High Bandwidth Memory(HBM)
KW - MultiChannel Parallel Controller
KW - Storage Subsystem
KW - Synthetic Aperture Radar(SAR)
UR - http://www.scopus.com/inward/record.url?scp=85203129392&partnerID=8YFLogxK
U2 - 10.1049/icp.2024.1449
DO - 10.1049/icp.2024.1449
M3 - Conference article
AN - SCOPUS:85203129392
SN - 2732-4494
VL - 2023
SP - 2327
EP - 2333
JO - IET Conference Proceedings
JF - IET Conference Proceedings
IS - 47
T2 - IET International Radar Conference 2023, IRC 2023
Y2 - 3 December 2023 through 5 December 2023
ER -