Monolithic Integration of Oxide Semiconductor FET and Ferroelectric Capacitor Enabled by Sn-Doped InGaZnO for 3-D Embedded RAM Application

Jixuan Wu*, Fei Mo, Takuya Saraya, Toshiro Hiramoto, Mototaka Ochi, Hiroshi Goto, Masaharu Kobayashi

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

41 Citations (Scopus)

Abstract

We have developed and integrated a mobility-enhanced FET and a wakeup-free ferroelectric (FE) capacitor using Sn-doped InGaZnO (IGZTO) and demonstrated 1T1C FeRAM cell operation for 3-D embedded RAM application. IGZTO FET can achieve >20 cm2/Vs mobility with an ultrathin channel, which is 2× higher than InGaZnO (IGZO) FET. The physics of mobility enhancement in oxide semiconductor FET with IGZTO channel is investigated by both experimental and simulation methods. The FE capacitor with large remanent polarization and lowerature process at 400 °C is achieved. We have also studied the impact of thin-film access transistors on 1T1C cell operation with gate voltage dependence and capacitor size dependence. SPICE simulation is used for an extremely scaled device that achieves ns operation. The proposed memory technology will enable high-density and energy-efficient computing by the proximity of processor core and memory in monolithic 3-D integration.

Original languageEnglish
Pages (from-to)6617-6622
Number of pages6
JournalIEEE Transactions on Electron Devices
Volume68
Issue number12
DOIs
Publication statusPublished - 1 Dec 2021
Externally publishedYes

Keywords

  • Ferroelectric (FE) memory
  • monolithic 3-D integration
  • oxide semiconductor FET

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