@inproceedings{61ad88607e7146499f7b30eb84cbaddf,
title = "Modeling and analysis of vertical noise coupling between clock tree and channel routing wire in 3D mixed signal integration",
abstract = "This paper reports on the vertical noise coupling between a clock wire in digital IC and channel routing wires in analog IC in 3D mixed signal integration. Full wave electromagnetic simulations are employed to evaluate the vertical noise coupling. The coupling mechanism is discussed with transfer impedance. Insights to vertical noise coupling between interconnects in 3D integration are offered and possible solutions are provided to reduce the noise.",
keywords = "channel routing wire, clock tree, signal integrity, three-dimensional integrated circuits (3D-IC), vertical coupling noise",
author = "Shiwei Wang and Yingtao Ding and Huanyu He and Lu, \{Jian Qiang\}",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015 ; Conference date: 18-05-2015 Through 21-05-2015",
year = "2015",
month = nov,
day = "10",
doi = "10.1109/IITC-MAM.2015.7325631",
language = "English",
series = "2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "79--81",
booktitle = "2015 IEEE International Interconnect Technology Conference and 2015 IEEE Materials for Advanced Metallization Conference, IITC/MAM 2015",
address = "United States",
}