Abstract
To meet the growing demands of ultra-high-density interconnects (UHDI) and 3D integration, high-performance integrated circuits (ICs) have evolved to impose increasingly stringent demands for ceramic substrates with superior thermal conductivity, electrical insulation, and mechanical robustness. Silicon nitride (Si3N4), with its exceptional thermal conductivity, mechanical robustness, and thermal shock resistance, has emerged as a promising alternative to conventional alumina (Al2O3) and aluminum nitride (AlN) substrates. Thick-film technology, widely employed in fabricating metal interconnects, resistive networks, and dielectric layers, enables complex electrical interconnections and functional integration on ceramic substrates. However, current thick-film paste sintering processes have been primarily optimized for Al2O3 and AlN substrates, encountering substantial challenges when adapted to Si3N4 due to its inherently low surface energy and high chemical inertness.This study investigates the feasibility of applying conventional thick-film sintering processes to Si3N4 substrates. To evaluate the compatibility of Si3N4 with thick-film sintering, resistor, conductor, and dielectric pastes were formulated and subjected to sintering, followed by microstructural characterization. Scanning electron microscopy (SEM), energy-dispersive X-ray spectroscopy (EDS), and X-ray Photoelectron Spectroscopy (XPS) analyses revealed significant challenges, including paste agglomeration, poor wetting and spreading behavior, and excessive porosity formation. The underlying causes of remaining problems in the sintering process of thick film pastes for Si3N4 are analyzed. The findings pave the way for future efforts to optimize paste formulations and sintering conditions for enhanced reliability in ICs applications.
| Original language | English |
|---|---|
| Title of host publication | 2025 26th International Conference on Electronic Packaging Technology, ICEPT 2025 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Edition | 2025 |
| ISBN (Electronic) | 9781665465809 |
| DOIs | |
| Publication status | Published - 2025 |
| Externally published | Yes |
| Event | 26th International Conference on Electronic Packaging Technology, ICEPT 2025 - Shanghai, China Duration: 5 Aug 2025 → 7 Aug 2025 |
Conference
| Conference | 26th International Conference on Electronic Packaging Technology, ICEPT 2025 |
|---|---|
| Country/Territory | China |
| City | Shanghai |
| Period | 5/08/25 → 7/08/25 |
Keywords
- Electronic Packaging
- Microstructural characterization
- Silicon nitride substrate
- Thick-film paste sintering
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