TY - GEN
T1 - Hybrid Acceleration of CNN-based Speech Enhancement on Embedded Platforms
AU - Li, Kaixu
AU - Pan, Ruixiang
AU - Wei, Lei
AU - Yan, Bo
AU - Lin, Jiazhen
AU - Zhang, Xiaoyan
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - Speech enhancement is a crucial component in speech signal processing. Enhancement models based on neural networks greatly outperform traditional approaches at the cost of huge amounts of parameters and complex network structures, making it quite difficult to work on embedded platforms. To address this issue, this paper designs a convolution accelerating algorithm based on an autoencoder network called Redundant Convolutional-Encoder-Decoder (R-CED). Two methods have been designed to accelerate the computation, including a convolution structure of 'parallel data path + control logic + on-chip cache' and a parallelization acceleration strategy in convolution operation. The system is implemented on Xilinx Zynq 7020 platform to validate its effectiveness. Compared with commonly used Central Processing Unit (CPU) and Graphics Processing Unit (GPU) platforms, the processing delay of the accelerated enhancement algorithm is only 0.0016s, reduced by up to 99% while keeping the Perceptual Evaluation of Speech Quality (PESQ) score under 0.015, making it possible for real-time speech enhancement to be implemented on embedded platforms.
AB - Speech enhancement is a crucial component in speech signal processing. Enhancement models based on neural networks greatly outperform traditional approaches at the cost of huge amounts of parameters and complex network structures, making it quite difficult to work on embedded platforms. To address this issue, this paper designs a convolution accelerating algorithm based on an autoencoder network called Redundant Convolutional-Encoder-Decoder (R-CED). Two methods have been designed to accelerate the computation, including a convolution structure of 'parallel data path + control logic + on-chip cache' and a parallelization acceleration strategy in convolution operation. The system is implemented on Xilinx Zynq 7020 platform to validate its effectiveness. Compared with commonly used Central Processing Unit (CPU) and Graphics Processing Unit (GPU) platforms, the processing delay of the accelerated enhancement algorithm is only 0.0016s, reduced by up to 99% while keeping the Perceptual Evaluation of Speech Quality (PESQ) score under 0.015, making it possible for real-time speech enhancement to be implemented on embedded platforms.
KW - Convolutional Neural Network
KW - Parallelization acceleration
KW - Speech enhancement
KW - Zynq
UR - http://www.scopus.com/inward/record.url?scp=85125302753&partnerID=8YFLogxK
U2 - 10.1109/UCET54125.2021.9675001
DO - 10.1109/UCET54125.2021.9675001
M3 - Conference contribution
AN - SCOPUS:85125302753
T3 - 2021 6th International Conference on UK-China Emerging Technologies, UCET 2021
SP - 53
EP - 58
BT - 2021 6th International Conference on UK-China Emerging Technologies, UCET 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Conference on UK-China Emerging Technologies, UCET 2021
Y2 - 4 November 2021 through 6 November 2021
ER -