High-performance InGaZnO/Ga2O3 heterostructure TFTs Gated by high-k Ta1.0La0.4O3.8 fabricated at room temperature

Zi Chun Liu; Jia Cheng Li; Yi Yun Zhang; Hui Xia Yang; Yuan Xiao Ma; Ye Liang Wang

doi:10.1016/j.apsusc.2024.161997

High-performance InGaZnO/Ga₂O₃ heterostructure TFTs Gated by high-k Ta_1.0La_0.4O_3.8 fabricated at room temperature

Zi Chun Liu
, Jia Cheng Li
, Yi Yun Zhang
, Hui Xia Yang^*
, Yuan Xiao Ma
, Ye Liang Wang

^*Corresponding author for this work

Beijing Institute of Technology
CAS - Institute of Semiconductors

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

High-performance indium-gallium-zinc-oxide (InGaZnO)/gallium oxide (Ga₂O₃) heterostructure thin-film transistors (TFTs) featuring high-k tantalum-lanthanum-oxide (TaLaO) gate dielectric have been successfully fabricated via room-temperature sputtering. As investigated by atomic force microscopy (AFM) and x-ray photoelectron spectroscopy (XPS), the high-k Ta_1.0La_0.4O_3.8 can be effectively smoothened by post-deposition plasma treatments at room temperature, suppressing interfacial defects of oxygen vacancies to improve interfacial quality. Remarkably, the electrical characteristics of the heterostructure TFTs are significantly improved by the O₂-plasma treatment to yield an ultralow subthreshold swing (SS) of 82.1 mV/dec, an ultrahigh on/off ratio (I_ON/I_OFF) of 4.1 × 10¹⁰, and a high field-effect mobility (µ_FE) of 68.0 cm²/V·s. This work presents an innovative method that is effective, ultralow-thermal-budget, and cost-efficient for high-performance heterostructure TFTs with high-k gate dielectrics.

Original language	English
Article number	161997
Journal	Applied Surface Science
Volume	685
DOIs	https://doi.org/10.1016/j.apsusc.2024.161997
Publication status	Published - 15 Mar 2025
Externally published	Yes

Keywords

High I/I
High-k dielectrics
InGaZnO/GaO heterostructure TFTs
Room-temperature fabrication
Ultra-low SS

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10.1016/j.apsusc.2024.161997

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title = "High-performance InGaZnO/Ga2O3 heterostructure TFTs Gated by high-k Ta1.0La0.4O3.8 fabricated at room temperature",

abstract = "High-performance indium-gallium-zinc-oxide (InGaZnO)/gallium oxide (Ga2O3) heterostructure thin-film transistors (TFTs) featuring high-k tantalum-lanthanum-oxide (TaLaO) gate dielectric have been successfully fabricated via room-temperature sputtering. As investigated by atomic force microscopy (AFM) and x-ray photoelectron spectroscopy (XPS), the high-k Ta1.0La0.4O3.8 can be effectively smoothened by post-deposition plasma treatments at room temperature, suppressing interfacial defects of oxygen vacancies to improve interfacial quality. Remarkably, the electrical characteristics of the heterostructure TFTs are significantly improved by the O2-plasma treatment to yield an ultralow subthreshold swing (SS) of 82.1 mV/dec, an ultrahigh on/off ratio (ION/IOFF) of 4.1 {\texttimes} 1010, and a high field-effect mobility (µFE) of 68.0 cm2/V·s. This work presents an innovative method that is effective, ultralow-thermal-budget, and cost-efficient for high-performance heterostructure TFTs with high-k gate dielectrics.",

keywords = "High I/I, High-k dielectrics, InGaZnO/GaO heterostructure TFTs, Room-temperature fabrication, Ultra-low SS",

author = "Liu, \{Zi Chun\} and Li, \{Jia Cheng\} and Zhang, \{Yi Yun\} and Yang, \{Hui Xia\} and Ma, \{Yuan Xiao\} and Wang, \{Ye Liang\}",

note = "Publisher Copyright: {\textcopyright} 2024 Elsevier B.V.",

year = "2025",

month = mar,

day = "15",

doi = "10.1016/j.apsusc.2024.161997",

language = "English",

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AU - Liu, Zi Chun

AU - Li, Jia Cheng

AU - Zhang, Yi Yun

AU - Yang, Hui Xia

AU - Ma, Yuan Xiao

AU - Wang, Ye Liang

PY - 2025/3/15

Y1 - 2025/3/15

N2 - High-performance indium-gallium-zinc-oxide (InGaZnO)/gallium oxide (Ga2O3) heterostructure thin-film transistors (TFTs) featuring high-k tantalum-lanthanum-oxide (TaLaO) gate dielectric have been successfully fabricated via room-temperature sputtering. As investigated by atomic force microscopy (AFM) and x-ray photoelectron spectroscopy (XPS), the high-k Ta1.0La0.4O3.8 can be effectively smoothened by post-deposition plasma treatments at room temperature, suppressing interfacial defects of oxygen vacancies to improve interfacial quality. Remarkably, the electrical characteristics of the heterostructure TFTs are significantly improved by the O2-plasma treatment to yield an ultralow subthreshold swing (SS) of 82.1 mV/dec, an ultrahigh on/off ratio (ION/IOFF) of 4.1 × 1010, and a high field-effect mobility (µFE) of 68.0 cm2/V·s. This work presents an innovative method that is effective, ultralow-thermal-budget, and cost-efficient for high-performance heterostructure TFTs with high-k gate dielectrics.

AB - High-performance indium-gallium-zinc-oxide (InGaZnO)/gallium oxide (Ga2O3) heterostructure thin-film transistors (TFTs) featuring high-k tantalum-lanthanum-oxide (TaLaO) gate dielectric have been successfully fabricated via room-temperature sputtering. As investigated by atomic force microscopy (AFM) and x-ray photoelectron spectroscopy (XPS), the high-k Ta1.0La0.4O3.8 can be effectively smoothened by post-deposition plasma treatments at room temperature, suppressing interfacial defects of oxygen vacancies to improve interfacial quality. Remarkably, the electrical characteristics of the heterostructure TFTs are significantly improved by the O2-plasma treatment to yield an ultralow subthreshold swing (SS) of 82.1 mV/dec, an ultrahigh on/off ratio (ION/IOFF) of 4.1 × 1010, and a high field-effect mobility (µFE) of 68.0 cm2/V·s. This work presents an innovative method that is effective, ultralow-thermal-budget, and cost-efficient for high-performance heterostructure TFTs with high-k gate dielectrics.

KW - High I/I

KW - High-k dielectrics

KW - InGaZnO/GaO heterostructure TFTs

KW - Room-temperature fabrication

KW - Ultra-low SS

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DO - 10.1016/j.apsusc.2024.161997

M3 - Article

AN - SCOPUS:85211128371

SN - 0169-4332

VL - 685

JO - Applied Surface Science

JF - Applied Surface Science

M1 - 161997

ER -

High-performance InGaZnO/Ga₂O₃ heterostructure TFTs Gated by high-k Ta_1.0La_0.4O_3.8 fabricated at room temperature

Abstract

Keywords

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