Abstract
To address performance degradation caused by the drain-induced barrier lowering (DIBL) effect in short-channel vertical thin-film transistors (VTFTs), this work proposes an ultrathin tunneling layer (TL) modification strategy. A 2 nm Al2O3 TL with low roughness, narrow bandgap, and low barrier height is fabricated at the drain-spacer sidewall-source interface, forming a TL-VTFT based on an In-Sn-Zn-O active layer (AL). This design overcomes the trade-off between DIBL suppression and performance enhancement. The TL increases the contact barrier, enabling space-charge-limited conduction (SCLC) at low electric fields and Fowler-Nordheim tunneling at medium-high fields, achieving a DIBL of only 0.045 V/V. Additionally, it optimizes the back-channel interface, reducing charge scattering and enhancing carrier transport. For short-channel devices (width 2000 nm and length 200 nm), a saturation mobility of 30.22 cm2/V ˙ s, subthreshold swing of 67.3 mV/dec, and current drivability of 16.58 μ A/μ m (Rds =0.5 V) are achieved. This work offers new insights for designing high-performance, low-DIBL short-channel VTFTs.
| Original language | English |
|---|---|
| Pages (from-to) | 4497-4501 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 73 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - 1 Jul 2026 |
| Externally published | Yes |
Keywords
- Drain-induced barrier lowering (DIBL)
- In-Sn-Zn-O
- thin-film transistor (TFT)
- tunneling layer (TL)
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