Hardware design and implementation of SM3 hash algorithm for financial IC card

Ye Hu; Liji Wu; An Wang; Beibei Wang

doi:10.1109/CIS.2014.176

Hardware design and implementation of SM3 hash algorithm for financial IC card

Ye Hu, Liji Wu, An Wang, Beibei Wang

Tsinghua University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Citations (Scopus)

Abstract

This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.

Original language	English
Title of host publication	Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	514-518
Number of pages	5
ISBN (Electronic)	9781479974344
DOIs	https://doi.org/10.1109/CIS.2014.176
Publication status	Published - 20 Jan 2015
Externally published	Yes
Event	10th International Conference on Computational Intelligence and Security, CIS 2014 - Kunming, Yunnan, China Duration: 15 Nov 2014 → 16 Nov 2014

Publication series

Name	Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014

Conference

Conference	10th International Conference on Computational Intelligence and Security, CIS 2014
Country/Territory	China
City	Kunming, Yunnan
Period	15/11/14 → 16/11/14

Keywords

Financial IC card
Low power
SM3 cryptographic hash algorithm
Small area

Access to Document

10.1109/CIS.2014.176

Cite this

Hu, Y., Wu, L., Wang, A., & Wang, B. (2015). Hardware design and implementation of SM3 hash algorithm for financial IC card. In Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014 (pp. 514-518). Article 7016949 (Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CIS.2014.176

Hu, Ye ; Wu, Liji ; Wang, An et al. / Hardware design and implementation of SM3 hash algorithm for financial IC card. Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014. Institute of Electrical and Electronics Engineers Inc., 2015. pp. 514-518 (Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014).

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title = "Hardware design and implementation of SM3 hash algorithm for financial IC card",

abstract = "This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.",

keywords = "Financial IC card, Low power, SM3 cryptographic hash algorithm, Small area",

author = "Ye Hu and Liji Wu and An Wang and Beibei Wang",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 10th International Conference on Computational Intelligence and Security, CIS 2014 ; Conference date: 15-11-2014 Through 16-11-2014",

year = "2015",

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doi = "10.1109/CIS.2014.176",

language = "English",

series = "Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Hu, Y, Wu, L, Wang, A & Wang, B 2015, Hardware design and implementation of SM3 hash algorithm for financial IC card. in Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014., 7016949, Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014, Institute of Electrical and Electronics Engineers Inc., pp. 514-518, 10th International Conference on Computational Intelligence and Security, CIS 2014, Kunming, Yunnan, China, 15/11/14. https://doi.org/10.1109/CIS.2014.176

Hardware design and implementation of SM3 hash algorithm for financial IC card. / Hu, Ye; Wu, Liji; Wang, An et al.
Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014. Institute of Electrical and Electronics Engineers Inc., 2015. p. 514-518 7016949 (Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Hardware design and implementation of SM3 hash algorithm for financial IC card

AU - Hu, Ye

AU - Wu, Liji

AU - Wang, An

AU - Wang, Beibei

PY - 2015/1/20

Y1 - 2015/1/20

N2 - This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.

AB - This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.

KW - Financial IC card

KW - Low power

KW - SM3 cryptographic hash algorithm

KW - Small area

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M3 - Conference contribution

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EP - 518

BT - Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014

PB - Institute of Electrical and Electronics Engineers Inc.

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Hu Y, Wu L, Wang A, Wang B. Hardware design and implementation of SM3 hash algorithm for financial IC card. In Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014. Institute of Electrical and Electronics Engineers Inc. 2015. p. 514-518. 7016949. (Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014). doi: 10.1109/CIS.2014.176

Hardware design and implementation of SM3 hash algorithm for financial IC card

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