TY - GEN
T1 - Hardware design and implementation of SM3 hash algorithm for financial IC card
AU - Hu, Ye
AU - Wu, Liji
AU - Wang, An
AU - Wang, Beibei
N1 - Publisher Copyright:
© 2014 IEEE.
PY - 2015/1/20
Y1 - 2015/1/20
N2 - This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.
AB - This paper focuses on the circuit design for SM3, which is the only standard hash algorithm of China. This paper presents a new VLSI architecture of SM3 for financial IC card. Since there is no such hardware implementation in literature, our work is the first one to integrate SM3 into financial IC card. In accordance with the technical specifications and based on SMIC 0.13um technology, the circuit design, behavioral simulation, gate-level simulation, power analysis, and the FPGA verification are all implemented. The results show that the SM3 IP core design is correct and feasible. Comprehensive validation results show that the design is within the area of 11000 gates and the power of 1mA @ 1.2V, suitable for financial IC card, which require small area and low power, and far below the design specifications.
KW - Financial IC card
KW - Low power
KW - SM3 cryptographic hash algorithm
KW - Small area
UR - http://www.scopus.com/inward/record.url?scp=84922900796&partnerID=8YFLogxK
U2 - 10.1109/CIS.2014.176
DO - 10.1109/CIS.2014.176
M3 - Conference contribution
AN - SCOPUS:84922900796
T3 - Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014
SP - 514
EP - 518
BT - Proceedings - 2014 10th International Conference on Computational Intelligence and Security, CIS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 10th International Conference on Computational Intelligence and Security, CIS 2014
Y2 - 15 November 2014 through 16 November 2014
ER -