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Hardware Accelerator Design for MUSIC-DOA Estimation with Bilateral Jacobi Optimization

  • Beijing Institute of Technology

Research output: Contribution to journalArticlepeer-review

Abstract

Real-time Direction of Arrival (DOA) estimation demands high computational throughput and numerical precision. Consequently, dedicated hardware accelerators are essential. This paper presents an architecture to accelerate the MUSIC algorithm using an improved complex bilateral Jacobi eigenvalue decomposition (EVD). First, we design a triangular systolic array for Hermitian matrices. It employs an output-stationary dataflow to enable efficient parallel covariance computation. Second, we propose an enhanced EVD algorithm. It replaces CORDIC approximations with direct analytical rotations. This significantly improves numerical stability and accuracy. Third, we introduce hardware optimizations. These include unit reuse, integrated termination conditions, and pre-stored steering vectors. These measures reduce resource consumption while maintaining full functionality. Experiments on a Xilinx Virtex-6 platform validate the design. The architecture achieves a root mean square error (RMSE) below (Formula presented.) with 300 snapshots. Processing latency is only 76.17 µs. The design utilizes 10,775 LUTs and 73 DSP slices. This work balances accuracy, speed, and efficiency. It offers a practical solution for real-time, high-precision DOA systems.

Original languageEnglish
Article number1982
JournalElectronics (Switzerland)
Volume15
Issue number10
DOIs
Publication statusPublished - May 2026
Externally publishedYes

Keywords

  • DOA
  • FPGA
  • Jacobi algorithm
  • MUSIC
  • hardware implementation
  • systolic array

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