HA-BFNN-ICP a Streaming FPGA Architecture for Energy Efficient Real-Time 3D LiDAR Mapping

Three-dimensional Light Detection and Ranging (3D LiDAR) sensors are widely used in autonomous vehicles including localization, sensing, and mapping. However, their significant computational requirements remains a major limitation. Although high-end Graphics Processing Units (GPUs) and Central Processing Units (CPUs) can solve the aforementioned problem, the cost and power consumption hinder the widespread adoption of 3-D LiDAR in commercial vehicles. To overcome these limitations, this paper presents a novel high-efficiency 3D mapping method that aims to achieve faster computation speeds than CPUs while providing better energy efficiency compared to GPUs. First, an optimized real-time LiDAR data preprocessing procedure is proposed, which is based on a fixed-point computation framework. Second, to accelerate the LiDAR point cloud matching process, we introduce a new processing architecture called Hardware Accelerated Brute Force Nearest Neighbor (HA-BFNN). Third, we further enhance real-time performance and energy efficiency by proposing a streaming FPGA accelerator architecture for both HA-BFNN and the Iterative Closest Point (ICP) algorithm. Experimental results show that our custom test board, based on the AMD Kintex-7 chip, accelerates point cloud matching, completing single-frame calculations in 5.76 ms, significantly outperforming other 3D mapping implementations on both CPUs and GPUs. Moreover, our FPGA implementation achieves up to 17.36× speedup in execution time compared to CPU implementations. Finally, the proposed system enables real-time performance while consuming only 3.4W of power, maintaining accuracy comparable to software counterparts and even state-of-the-art 3D mapping methods.