@inproceedings{098b891e4cbb4ad3a1077a9298334f8b,
title = "FPGA implementation of NAND flash wear-levelling algorithm",
abstract = "NAND flash would generate invalid blocks during its manufacturing and using, and the invalid block management is a key point of NAND flash. By studying the structure and storage rules of NAND flash, this paper put forward a wear-levelling algorithm against the invalid blocks of NAND flash based on FPGA. This algorithm use invalid block table and logical-physical address mapping table to manage the invalid blocks and do wear-levelling. The design is implemented by VHDL, and successfully realized the wear-levelling and the reading and writing operations of NAND flash.",
keywords = "FPGA, NAND flash, Wear-levelling",
author = "Juhong Wen and Weijiang Wang and Wei Gao and Xiaonan Fan",
year = "2013",
doi = "10.4028/www.scientific.net/AMM.241-244.1209",
language = "English",
isbn = "9783037855461",
series = "Applied Mechanics and Materials",
pages = "1209--1212",
booktitle = "Industrial Instrumentation and Control Systems",
note = "2012 International Conference on Measurement, Instrumentation and Automation, ICMIA 2012 ; Conference date: 15-09-2012 Through 16-09-2012",
}