FPGA implement of SVD for dimensionality reduction in hyperspectral images

To solve hyperspectral image's problems of the high dimensionality, the huge amount of data, and the real-time solution and so on, a real-time hyperspectral dimensionality reduction method is brought forward. Based on singular value decomposition (SVD) method, hyperspectral dimensionality is reduction, and finish the design of the chip system with top-down method. The chip system is divided into autocorrelation module, SVD module, feature extraction module and dimensionality reduction module. It completes the design, simulation and verification of these modules. The results indicate that the hyperspectral image reduced to 1/3, classification error is only 0.2109 percent after the dimensionality reduction. All of this show, the SVD method for hyperspectral dimensionality reduction is effective.