Abstract
This brief proposes an electrical method using simple resistor chain in parallel to quickly locate open circuits in a 3-D chip. This method is theoretically analyzed using the equivalent circuit, and experimentally validated by a 3-D integrated circuit (3-D IC). The fabricated 3-D IC consists of one printed circuit board, one organic substrate, and seven 65-nm CMOS dies stacked using microbumps and through-silicon vias. Results show that, the proposed parallel resistor chain can efficiently locate opens in a complicated 3-D IC within several minutes, using the resistance measured by power supply or multimeter only.
| Original language | English |
|---|---|
| Article number | 6817584 |
| Pages (from-to) | 2584-2587 |
| Number of pages | 4 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 61 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - Jul 2014 |
Keywords
- 3-D integrated circuit (3-D IC)
- location
- open
- parallel resistor chain
- through silicon via (TSV).
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