Double-Sided Fabrication of TSV Interposer With Parylene-Based Damascene RDLs Achieved by Selective Electroless Plating

In this letter, a novel double-sided fabrication scheme for Si interposer composed of through-silicon-vias (TSVs) and re-distribution layers (RDLs) is proposed. The ultra-deep TSVs are manufactured based on through-vias by double-sided processes. After chemical mechanical polishing (CMP) on both sides, a novel Damascene process based on selective electroless plating (ELP) is carried out to fabricate RDLs with parylene dielectric layers, in which the Cu RDLs are selectively formed in etched patterns as the catalysts are only reserved in these regions by incorporating a lift-off step into ELP. Note that the fabrication scheme shows good conformability across the 4-inch wafer, which exhibits a small warpage of only 64.7 µm. Measurement results highlight the good electrical performance of the fabricated TSVs in terms of keeping stable parasitic capacitance as low as 565 fF in the range of −40 V to 40 V, and low leakage current of 1.21 pA at 20 V.