Design of a diode-bridge track-and-hold circuit

This paper presents a dual-stage, fully-differential track-and-hold circuit, in which both stages have independent clock buffer, and can be configured to track mode independently. This circuit is implemented with 1 μm GaAs HBT technology with the area of 1.8 mm×2 mm and the power consumption of 2.75 W. The proposed track-and-hold circuit is capable of operating under 1 GS/s, and sampling bandwidth exceeds 7 GHz with 250 mV peak to peak single-ended input; It has 8 bit ENOB when the input single-ended input signal is under 250 mV peak to peak with frequency from DC to 2 GHz.