Design and implementation of HPRF stepped frequency radar echo simulator

Quan Hua Liu, Dazhi Zeng*, Qian Hu, Teng Long

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

A HPRF stepped frequency radar echo simulator for performance evaluation and test of radar system is introduced in this paper. The echo model of HPRF stepped frequency radar is analyzed, and its expression, considering range ambiguity and relation between intermediate frequency bandwidth and range window, is given. This paper proposed an implement scheme of HPRF stepped frequency radar echo simulator based on DAC chip AD9736. The simulator can generate kinds of radar baseband and intermediate frequency waveforms realtime, including clutters and noise if needed. It also supports data replay and provides common digital interface such as Ethernet, RS422 etc. So the simulator has the feature of universal usage. Finally, testing result demonstrates the effectiveness of the simulator.

Original languageEnglish
Title of host publicationICTM 2009 - 2009 International Conference on Test and Measurement
Pages123-126
Number of pages4
DOIs
Publication statusPublished - 2009
Event2009 International Conference on Test and Measurement, ICTM 2009 - Hong Kong, Hong Kong
Duration: 5 Dec 20096 Dec 2009

Publication series

NameProceedings of the International Symposium on Test and Measurement
Volume1

Conference

Conference2009 International Conference on Test and Measurement, ICTM 2009
Country/TerritoryHong Kong
CityHong Kong
Period5/12/096/12/09

Keywords

  • DAC
  • HPRF
  • Performance evaluation
  • Radar echo simulator
  • Stepped frequency radar

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