Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration

Li Shiwen; Dang Hua; Gao Peng; Gui Xiaoyan; Chen Zhiming; Wang Xinghua; Zhong Shunan

doi:10.1109/GreenCom-iThings-CPSCom.2013.339

Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration

Li Shiwen, Dang Hua^*, Gao Peng, Gui Xiaoyan, Chen Zhiming, Wang Xinghua, Zhong Shunan

^*Corresponding author for this work

School of Integrated Circuits and Electronics

Beijing Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

5 Citations (Scopus)

Abstract

A 1Gsps 5-bit Flash ADC is designed with offset calibration and fabricated in TSMC 0.18μm CMOS process. This design contains the basic Flash ADC circuit and offset calibration. To achieve a high speed sampling rate, preamplifier with latch is applied. And in order to reduce the offset which is caused by mismatch, a type of calibration with current trimming is analysed and realized. The results of chip test with calibration show that the SNDR reaches 29.6dB and the SFDR reaches 45.6dB under the input frequency of 39MHz with 1GHz sampling rate.

Original language	English
Title of host publication	Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013
Pages	1829-1833
Number of pages	5
DOIs	https://doi.org/10.1109/GreenCom-iThings-CPSCom.2013.339
Publication status	Published - 2013
Event	2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013 - Beijing, China Duration: 20 Aug 2013 → 23 Aug 2013

Publication series

Name	Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013

Conference

Conference	2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013
Country/Territory	China
City	Beijing
Period	20/08/13 → 23/08/13

Keywords

Flash ADC
Offset calibration
Preamplifier with latch

Access to Document

10.1109/GreenCom-iThings-CPSCom.2013.339

Cite this

Shiwen, L., Hua, D., Peng, G., Xiaoyan, G., Zhiming, C., Xinghua, W., & Shunan, Z. (2013). Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration. In Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013 (pp. 1829-1833). Article 6682350 (Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013). https://doi.org/10.1109/GreenCom-iThings-CPSCom.2013.339

Shiwen, Li ; Hua, Dang ; Peng, Gao et al. / Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration. Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013. 2013. pp. 1829-1833 (Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013).

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title = "Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration",

abstract = "A 1Gsps 5-bit Flash ADC is designed with offset calibration and fabricated in TSMC 0.18μm CMOS process. This design contains the basic Flash ADC circuit and offset calibration. To achieve a high speed sampling rate, preamplifier with latch is applied. And in order to reduce the offset which is caused by mismatch, a type of calibration with current trimming is analysed and realized. The results of chip test with calibration show that the SNDR reaches 29.6dB and the SFDR reaches 45.6dB under the input frequency of 39MHz with 1GHz sampling rate.",

keywords = "Flash ADC, Offset calibration, Preamplifier with latch",

author = "Li Shiwen and Dang Hua and Gao Peng and Gui Xiaoyan and Chen Zhiming and Wang Xinghua and Zhong Shunan",

year = "2013",

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series = "Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013",

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booktitle = "Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013",

note = "2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013 ; Conference date: 20-08-2013 Through 23-08-2013",

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Shiwen, L, Hua, D, Peng, G, Xiaoyan, G, Zhiming, C, Xinghua, W & Shunan, Z 2013, Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration. in Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013., 6682350, Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013, pp. 1829-1833, 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013, Beijing, China, 20/08/13. https://doi.org/10.1109/GreenCom-iThings-CPSCom.2013.339

Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration. / Shiwen, Li; Hua, Dang; Peng, Gao et al.
Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013. 2013. p. 1829-1833 6682350 (Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Shiwen, Li

AU - Hua, Dang

AU - Peng, Gao

AU - Xiaoyan, Gui

AU - Zhiming, Chen

AU - Xinghua, Wang

AU - Shunan, Zhong

PY - 2013

Y1 - 2013

N2 - A 1Gsps 5-bit Flash ADC is designed with offset calibration and fabricated in TSMC 0.18μm CMOS process. This design contains the basic Flash ADC circuit and offset calibration. To achieve a high speed sampling rate, preamplifier with latch is applied. And in order to reduce the offset which is caused by mismatch, a type of calibration with current trimming is analysed and realized. The results of chip test with calibration show that the SNDR reaches 29.6dB and the SFDR reaches 45.6dB under the input frequency of 39MHz with 1GHz sampling rate.

AB - A 1Gsps 5-bit Flash ADC is designed with offset calibration and fabricated in TSMC 0.18μm CMOS process. This design contains the basic Flash ADC circuit and offset calibration. To achieve a high speed sampling rate, preamplifier with latch is applied. And in order to reduce the offset which is caused by mismatch, a type of calibration with current trimming is analysed and realized. The results of chip test with calibration show that the SNDR reaches 29.6dB and the SFDR reaches 45.6dB under the input frequency of 39MHz with 1GHz sampling rate.

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KW - Offset calibration

KW - Preamplifier with latch

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BT - Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013

T2 - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013

Y2 - 20 August 2013 through 23 August 2013

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Shiwen L, Hua D, Peng G, Xiaoyan G, Zhiming C, Xinghua W et al. Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration. In Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013. 2013. p. 1829-1833. 6682350. (Proceedings - 2013 IEEE International Conference on Green Computing and Communications and IEEE Internet of Things and IEEE Cyber, Physical and Social Computing, GreenCom-iThings-CPSCom 2013). doi: 10.1109/GreenCom-iThings-CPSCom.2013.339

Design and implementation of a CMOS 1Gsps 5bit flash ADC with offset calibration

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