CMP-oriented shared multi-channel Cache architecture and its prototype construction

To construct a rational and efficient communication structure and a high-efficient data storage path for CMP system, a kind of scalable and configurable CMP architecture utilizing multi-channel Cache (AUMCC) is proposed in this article and its prototype system is established based on FPGA and LOEN3 processor. Multi-channel Cache is adopted as L2 Cache in AUMCC. AUMCC can be configured to be private L2 Cache structure or shared L2 Cache structure based on the access mode of multi-channel Cache. Simulation and testing results show that AUMCC architecture can achieve about 37% performance improvement compared with shared L2 Cache BUS-centric (SCA) architecture, and the hierarchy characteristic of AUMCC assures the good scalability.