CMOS sensor sequences designing of high-speed image acquisition system based on FPGA

  • Zhonghua Huang*
  • , Hualong Li
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

High-speed image acquisition technology can be used in lots of industrial or scientific occasions to analysis dynamic process of experiments or tests. This paper proposed a low-cost multi-occasion high-speed image acquisition system. Based on completed hardware platform, we chose VHDL to complete the software design. Aimed at the sequences designing of CMOS sensor, the way of using counters to create sequences with VHDL has been chosen and it is more suitable for VHDL to describe the sequence with strict timing relationship. And then the programs has been simulated and synthesized, the results indicates that the course of design, simulation and verification is reasonable and efficient.

Original languageEnglish
Title of host publicationProceedings - 2009 International Conference on Computational Intelligence and Software Engineering, CiSE 2009
DOIs
Publication statusPublished - 2009
Event2009 International Conference on Computational Intelligence and Software Engineering, CiSE 2009 - Wuhan, China
Duration: 11 Dec 200913 Dec 2009

Publication series

NameProceedings - 2009 International Conference on Computational Intelligence and Software Engineering, CiSE 2009

Conference

Conference2009 International Conference on Computational Intelligence and Software Engineering, CiSE 2009
Country/TerritoryChina
CityWuhan
Period11/12/0913/12/09

Keywords

  • CMOS
  • FPGA
  • Programming
  • VHDL

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