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CMOS limiting amplifier for SDH STM-16 optical receiver

  • Rui Tao
  • , Zhi Gong Wang
  • , Ting Ting Xie
  • , Hai Tao Chen
  • , Yi Dong
  • , Shi Zhong Xie
  • Southeast University, Nanjing
  • Tsinghua University

Research output: Contribution to journalArticlepeer-review

Abstract

A 2.5Gbit/s limiting amplifier is realised in a 0.35μm CMOS technology. At a supply voltage of 5V, the power dissipation is 225mW. The input dynamic range is about 40dB at a constant output voltage swing (400mVp-p). The chip area is 1 × 1.1 mm2.

Original languageEnglish
Pages (from-to)236-237
Number of pages2
JournalElectronics Letters
Volume37
Issue number4
DOIs
Publication statusPublished - 15 Feb 2001
Externally publishedYes

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