Build-in-self-test of a real time digital signal processing system

Haipeng Yuan; Teng Long; Yansheng Yue

doi:10.1109/ICR.2001.984875

Build-in-self-test of a real time digital signal processing system

Haipeng Yuan
, Teng Long^*
, Yansheng Yue

^*Corresponding author for this work

School of Information and Electronics

Beijing Institute of Technology

Research output: Contribution to conference › Paper › peer-review

1 Citation (Scopus)

Abstract

A new method of built-in self-test of a real time digital signal processor is offered. This method is a hybrid one of board-level testing and system-level testing, could integrate system adjustment, on-line testing and off-line testing in one BIST architecture. The implementation of the BIST is offered, and the performance of the time domain processing test and frequency domain processing test are analysed.

Original language	English
Pages	983-986
Number of pages	4
DOIs	https://doi.org/10.1109/ICR.2001.984875
Publication status	Published - 2001
Event	2001 CIE International Conference on Radar Proceedings - Beijing, China Duration: 15 Oct 2001 → 18 Oct 2001

Conference

Conference	2001 CIE International Conference on Radar Proceedings
Country/Territory	China
City	Beijing
Period	15/10/01 → 18/10/01

Keywords

Built-in self-test
Digital signal processor
Testable design

Access to Document

10.1109/ICR.2001.984875

Cite this

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title = "Build-in-self-test of a real time digital signal processing system",

abstract = "A new method of built-in self-test of a real time digital signal processor is offered. This method is a hybrid one of board-level testing and system-level testing, could integrate system adjustment, on-line testing and off-line testing in one BIST architecture. The implementation of the BIST is offered, and the performance of the time domain processing test and frequency domain processing test are analysed.",

keywords = "Built-in self-test, Digital signal processor, Testable design",

author = "Haipeng Yuan and Teng Long and Yansheng Yue",

year = "2001",

doi = "10.1109/ICR.2001.984875",

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note = "2001 CIE International Conference on Radar Proceedings ; Conference date: 15-10-2001 Through 18-10-2001",

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AU - Yuan, Haipeng

AU - Long, Teng

AU - Yue, Yansheng

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N2 - A new method of built-in self-test of a real time digital signal processor is offered. This method is a hybrid one of board-level testing and system-level testing, could integrate system adjustment, on-line testing and off-line testing in one BIST architecture. The implementation of the BIST is offered, and the performance of the time domain processing test and frequency domain processing test are analysed.

AB - A new method of built-in self-test of a real time digital signal processor is offered. This method is a hybrid one of board-level testing and system-level testing, could integrate system adjustment, on-line testing and off-line testing in one BIST architecture. The implementation of the BIST is offered, and the performance of the time domain processing test and frequency domain processing test are analysed.

KW - Built-in self-test

KW - Digital signal processor

KW - Testable design

UR - https://www.scopus.com/pages/publications/0035719615

U2 - 10.1109/ICR.2001.984875

DO - 10.1109/ICR.2001.984875

M3 - Paper

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T2 - 2001 CIE International Conference on Radar Proceedings

Y2 - 15 October 2001 through 18 October 2001

ER -

Build-in-self-test of a real time digital signal processing system

Abstract

Conference

Keywords

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