An UWB low noise amplifier in 0.13 μm CMOS

Li Mei Su; Qun Hao; Jian Rong Ma

doi:10.3969/j.issn.1673-3193.2013.02.023

An UWB low noise amplifier in 0.13 μm CMOS

Li Mei Su^*, Qun Hao, Jian Rong Ma

^*Corresponding author for this work

School of Optics and Photonics

Research output: Contribution to journal › Article › peer-review

Abstract

Aiming at the design of radio frequency (RF) front-end of the ultra-wideband (UWB) system with the signal frequency band of 3.1~10.6 GHz, a low noise amplifier (LNA) based on 0.13 μm CMOS technology was presented. With cascading the first stage with single-ended resistor feedback architecture and the second stage of single-to-differential voltage buffer, the proposed LNA obtained large power gain and simultaneously realized input impedance matching in the whole ultra wideband. The simulation results show a 23.2 dB voltage gain and input return loss below -13 dB from 3.1~10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and -11.9 dBm IIP3 at 6 GHz are achieved. With 1.2 V supply voltage, the wideband LNA consumes 12.2 mW. The silicon area is 0.32 mm².

Original language	English
Pages (from-to)	199-203
Number of pages	5
Journal	Zhongbei Daxue Xuebao (Ziran Kexue Ban)/Journal of North University of China (Natural Science Edition)
Volume	34
Issue number	2
DOIs	https://doi.org/10.3969/j.issn.1673-3193.2013.02.023
Publication status	Published - Apr 2013

Keywords

CMOS
Feedback
Low-noise amplifier
Ultra wideband

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10.3969/j.issn.1673-3193.2013.02.023

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title = "An UWB low noise amplifier in 0.13 μm CMOS",

abstract = "Aiming at the design of radio frequency (RF) front-end of the ultra-wideband (UWB) system with the signal frequency band of 3.1~10.6 GHz, a low noise amplifier (LNA) based on 0.13 μm CMOS technology was presented. With cascading the first stage with single-ended resistor feedback architecture and the second stage of single-to-differential voltage buffer, the proposed LNA obtained large power gain and simultaneously realized input impedance matching in the whole ultra wideband. The simulation results show a 23.2 dB voltage gain and input return loss below -13 dB from 3.1~10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and -11.9 dBm IIP3 at 6 GHz are achieved. With 1.2 V supply voltage, the wideband LNA consumes 12.2 mW. The silicon area is 0.32 mm2.",

keywords = "CMOS, Feedback, Low-noise amplifier, Ultra wideband",

author = "Su, {Li Mei} and Qun Hao and Ma, {Jian Rong}",

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doi = "10.3969/j.issn.1673-3193.2013.02.023",

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journal = "Zhongbei Daxue Xuebao (Ziran Kexue Ban)/Journal of North University of China (Natural Science Edition)",

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publisher = "North China Institute of Technology",

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T1 - An UWB low noise amplifier in 0.13 μm CMOS

AU - Su, Li Mei

AU - Hao, Qun

AU - Ma, Jian Rong

PY - 2013/4

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N2 - Aiming at the design of radio frequency (RF) front-end of the ultra-wideband (UWB) system with the signal frequency band of 3.1~10.6 GHz, a low noise amplifier (LNA) based on 0.13 μm CMOS technology was presented. With cascading the first stage with single-ended resistor feedback architecture and the second stage of single-to-differential voltage buffer, the proposed LNA obtained large power gain and simultaneously realized input impedance matching in the whole ultra wideband. The simulation results show a 23.2 dB voltage gain and input return loss below -13 dB from 3.1~10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and -11.9 dBm IIP3 at 6 GHz are achieved. With 1.2 V supply voltage, the wideband LNA consumes 12.2 mW. The silicon area is 0.32 mm2.

AB - Aiming at the design of radio frequency (RF) front-end of the ultra-wideband (UWB) system with the signal frequency band of 3.1~10.6 GHz, a low noise amplifier (LNA) based on 0.13 μm CMOS technology was presented. With cascading the first stage with single-ended resistor feedback architecture and the second stage of single-to-differential voltage buffer, the proposed LNA obtained large power gain and simultaneously realized input impedance matching in the whole ultra wideband. The simulation results show a 23.2 dB voltage gain and input return loss below -13 dB from 3.1~10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and -11.9 dBm IIP3 at 6 GHz are achieved. With 1.2 V supply voltage, the wideband LNA consumes 12.2 mW. The silicon area is 0.32 mm2.

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An UWB low noise amplifier in 0.13 μm CMOS

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Keywords

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