Abstract
This paper presents an ultra-broadband on-chip bias network for distributed amplifiers (DAs) in indium phosphide (InP) technology, eliminating conventional RF-choke constraints through a reconfigurable 2-port DC-feed block. Capitalizing on distributed amplification principles, the reverse-configured topology with strategic port inversion grounds RF pathways while integrating an R-C impedance network (50- resistor + 0.2-pF capacitor) to suppress power supply noise and enable native cascadability. Measured results demonstrate ultra-broadband operation with >10 dB isolation from 20 to 170 GHz in a compact size of 0.015 mm. Crucially, the proposed architecture eliminates external bias-tee modules by providing on-demand reconfigurability, and the direct RF-port connection evolves the DC-feed into a fully operational 3-port bias-tee, unlocking monolithic integrated circuits (MMICs) and sub-terahertz (sub-THz) wireless applications. This architecture optimizes noise suppression, test complexity, and functional flexibility, establishing another topology for integrated bias networks.
| Original language | English |
|---|---|
| Journal | Journal of Electronic Testing: Theory and Applications (JETTA) |
| DOIs | |
| Publication status | Accepted/In press - 2026 |
| Externally published | Yes |
Keywords
- Bias-tee
- DC-feed block
- InP
- MMIC
- Sub-THz
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