An optimized under-sampling 10b high speed ADC

Xinghua Wang*, Shun'an Zhong, Zhuo Zhang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A pipelined ADC with under-sampling technique is proposed. Under SMIC 0.35um 1P6M process, the performance of SNR reaches nearly 66dB with the condition that the sampling rate is 62.5MHz and the input frequency is scanned from 1MHz to 76MHz except the Nyquist point. The typical power consumption is about 90mW. Compared with Nyquist sampling, this design has lower power and less die area.

Original languageEnglish
Title of host publication2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010
Pages158-162
Number of pages5
DOIs
Publication statusPublished - 2010
Event2nd International Conference on Computer and Automation Engineering, ICCAE 2010 - Singapore, Singapore
Duration: 26 Feb 201028 Feb 2010

Publication series

Name2010 The 2nd International Conference on Computer and Automation Engineering, ICCAE 2010
Volume3

Conference

Conference2nd International Conference on Computer and Automation Engineering, ICCAE 2010
Country/TerritorySingapore
CitySingapore
Period26/02/1028/02/10

Keywords

  • Bootstrapped
  • Operational amplifier
  • Pipelined ADC
  • Under sampling

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