An Experimental Study on a Barrier-less Cu Interconnect Scheme with Polyimide Insulator for Cost-Effective 3D Packaging

Polyimide (PI) has been widely used as the insulator material in the Cu interconnect system for three-dimensional (3D) advanced packaging. In general, a barrier layer is required between PI and Cu to suppress Cu diffusion, which increases the fabrication cost and complexity. In this article, we experimentally investigate the feasibility of a barrier-less Cu interconnect scheme with PI insulator while omitting the typical barrier layer. The diffusion phenomenon of sputtered Cu in PI is evaluated by the energy dispersive X-ray spectroscopy (EDX) analyses and the Fourier transform infrared spectroscopy (FTIR) tests. It is revealed that the PI layer with sufficient thickness can prevent the Cu atoms from diffusing into the Si substrate even after annealing at 300 °C for 1 h. Electrical measurement results based on the Cu-PI-Si structure show that the leakage currents are relatively small across various test temperatures, and there is little degradation in the insulating performance of PI after annealing. Moreover, time dependent dielectric breakdown (TDDB) tests are carried out and the mean-time-to-failure (MTTF) of PI before or after annealing is estimated to be more than 10 years for electric fields less than 1.45 MV/cm or 1.25 MV/cm, respectively. Therefore, the proposed barrier-less Cu interconnect scheme with PI insulator demonstrates feasibility in terms of insulating performance and long-term reliability. This scheme is further implemented in the vertical through-silicon-via (TSV) structure by a low-cost fabrication flow, which exhibits good electrical performance in both the leakage current and the parasitic capacitance.