An efficient design for general mixed radix FFT processors

Cuimei Ma; He Chen; Yijian Liu; Yanfei Wang

doi:10.1587/elex.13.20160060

An efficient design for general mixed radix FFT processors

Cuimei Ma
, He Chen
, Yijian Liu
, Yanfei Wang

School of Optics and Photonics

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

A general mixed-radix FFT design for in-place strategy is derived and a low-complexity scheme for efficiently implementing mixedradix FFTs is proposed. In this method, we develop an accumulator that can simply and practically generate addresses for the operands, as well as the twiddle factors. This approach extends the range of FFT size and reduces the hardware complexity of any non-power-of-two memory-based FFTs. Finally, the 3780-point FFT is taken an example to illustrate the validation of the proposed method.

Original language	English
Article number	20160060
Journal	IEICE Electronics Express
Volume	13
Issue number	6
DOIs	https://doi.org/10.1587/elex.13.20160060
Publication status	Published - 3 Mar 2016

Keywords

Access address
Generalized mixed-radix FFT
In place
Low complexity

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10.1587/elex.13.20160060

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KW - In place

KW - Low complexity

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An efficient design for general mixed radix FFT processors

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Keywords

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