A RISC-V Processor with Optimized CORDIC-Based Trigonometric Function Accelerator

  • Ruixiao Zhao
  • , Min Xie*
  • , Xinchen Li
  • , Yujie Zhang
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Trigonometric functions are extensively utilized in engineering applications. Processors typically handle such operations in floating-point format using software-based methods, which exhibit significant latency. By employing an optimized CORDIC algorithm and a hardware architecture that emphasizes resource reuse, this paper presents a RISC-V embedded processor supporting floating-point trigonometric function extension and expands two dedicated trigonometric instructions. Evaluations on the XC7Z020 platform demonstrate that, compared to the processor without extended instructions, the proposed design achieves a speedup of 193× in trigonometric computations with an 18.7% increase in resource consumption.

Original languageEnglish
Title of host publication2025 IEEE 14th International Conference on Communications, Circuits, and Systems, ICCCAS 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages155-159
Number of pages5
ISBN (Electronic)9798331544775
DOIs
Publication statusPublished - 2025
Externally publishedYes
Event14th IEEE International Conference on Communications, Circuits, and Systems, ICCCAS 2025 - Wuhan, China
Duration: 23 May 202525 May 2025

Publication series

Name2025 IEEE 14th International Conference on Communications, Circuits, and Systems, ICCCAS 2025

Conference

Conference14th IEEE International Conference on Communications, Circuits, and Systems, ICCCAS 2025
Country/TerritoryChina
CityWuhan
Period23/05/2525/05/25

Keywords

  • CORDIC
  • RISC-V
  • instruction set extension
  • trigonometric function

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