A RISC-V-based SoC for pedestrian navigation system

PNS(Pedestrian navigation system) refers to positioning specifically for people. Among them, the strapdown positioning solution has high accuracy and a lack of reliance on external equipment. However, it requires real-time performance and low chip power consumption. This article proposes a pedestrian positioning SoC(System on chip) based on RISC-V architecture. The study evaluated the performance of RISC-V processors in comparison to other processors, in terms of resource utilization and energy consumption, for a navigation application that uses IMU (Inertial Measurement Unit) sensors. The processors were implemented in the Hummingbird e203 SoC and synthesized using Vivado IDE. Finally, the study verified the processors on FPGA (Field Programmable Gate Array). The results showed a 34x improvement in performance and 5.6x increase in energy efficiency compared to the initial e203 core. Additionally, the processors were found to be 5x faster than cv32e40p. By enabling the FPU (floating point unit), the instruction number dropped by 20 times, and the performance increased by 40% by enabling VPU (vector processing unit).