A novel three-phase software phase-locked loop based on frequency-locked loop and initial phase angle detection phase-locked loop

  • Liang Wang*
  • , Qirong Jiang
  • , Lucheng Hong
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes a new three-phase software phase-locked loop (SPLL) which operates fast and accurately in unbalanced, polluted and frequency deviated circumstances. This new proposed SPLL consists of frequency-locked loop (FLL) and initial phase angle detection PLL. The FLL employs differential algorithm to detect frequency error which could immune to phase jumps and voltage sharp changes. A frequency adaptive digital filter (FADF) is included in FLL to reject harmonics. The FADF uses two strategies to sweep away disturbing signals in a synchronous reference domain. Firstly, specific order harmonics are eliminated by multistage application of delayed signal cancellation (DSC) using estimated delayed signals. Excellent steady-state performance of multistage DSC to reject harmonics is achieved with the help of FLL and interpolation strategy. Secondly, a conventional low-pass (LP) filter damps the rest higher frequency harmonics and noises. Initial phase angle detection PLL could have a high cutoff frequency due to good performance of FADF. Simulations prove the new SPLL responds fast and has precise steady-state output.

Original languageEnglish
Title of host publicationProceedings, IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society
Pages150-155
Number of pages6
DOIs
Publication statusPublished - 2012
Externally publishedYes
Event38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012 - Montreal, QC, Canada
Duration: 25 Oct 201228 Oct 2012

Publication series

NameIECON Proceedings (Industrial Electronics Conference)

Conference

Conference38th Annual Conference on IEEE Industrial Electronics Society, IECON 2012
Country/TerritoryCanada
CityMontreal, QC
Period25/10/1228/10/12

Keywords

  • Delayed Signal Cancellation
  • Digital Filter
  • Frequency-Locked Loop
  • Grid Synchronization
  • Software Phase-Locked Loop

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