TY - GEN
T1 - A method of multi-channel pulse acquisition synchronization
AU - Ai, Zhanyang
AU - Wang, Longhui
AU - Liu, Guoman
AU - Xu, Chengfa
N1 - Publisher Copyright:
© 2017 IEEE.
PY - 2017/8/30
Y1 - 2017/8/30
N2 - In multi-channel pulse acquisition system, it needs to ensure two kinds of synchronization. One is channel synchronization, the other is pulse synchronization. In order to ensure the two synchronizations, a method was proposed by using ADC reset signal to control ADC start-up simultaneously and sequential logic of internal sampling clock fixed. Through the analysis of multi-channel pulse acquisition system architecture, ADC start-up simultaneously could ensure channel synchronization. By the analysis of sequential logic, fixed phase of internal sampling clock could ensure pulse synchronization. Through experiments, channel synchronization deviation is less than 2ps and pulse synchronization deviation is less than 5ps.
AB - In multi-channel pulse acquisition system, it needs to ensure two kinds of synchronization. One is channel synchronization, the other is pulse synchronization. In order to ensure the two synchronizations, a method was proposed by using ADC reset signal to control ADC start-up simultaneously and sequential logic of internal sampling clock fixed. Through the analysis of multi-channel pulse acquisition system architecture, ADC start-up simultaneously could ensure channel synchronization. By the analysis of sequential logic, fixed phase of internal sampling clock could ensure pulse synchronization. Through experiments, channel synchronization deviation is less than 2ps and pulse synchronization deviation is less than 5ps.
KW - ADC
KW - Channel synchronization
KW - FPGA
KW - Multi-channel pulse acquisition system
KW - Pulse synchronization
UR - https://www.scopus.com/pages/publications/85031663856
U2 - 10.1109/CIRSYSSIM.2017.8023206
DO - 10.1109/CIRSYSSIM.2017.8023206
M3 - Conference contribution
AN - SCOPUS:85031663856
T3 - 2017 International Conference on Circuits, System and Simulation, ICCSS 2017
SP - 176
EP - 179
BT - 2017 International Conference on Circuits, System and Simulation, ICCSS 2017
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2017 International Conference on Circuits, System and Simulation, ICCSS 2017
Y2 - 14 July 2017 through 17 July 2017
ER -