A Low-Complexity Low-Ripple Buck DC-DC Converter Based on Module Reuse

Yuyang Ding, Xinyuan Han, Chen Wang, Xukun Wang, Bo Zhou, Ling Fu

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Based on double comparators and several digital units, a buck DC-DC converter is implemented in 65-nm CMOS. The switching frequency is automatic sliding from dozen kHz to sub-MHz for different load conditions. Simulated results show that the presented DC-DC converter achieve a peak-to-peak ripple voltage smaller than 2.55 mV, with the switching frequency of 18-526 kHz. The proposed DC-DC converter also has a high efficiency up to 94%, with the supply voltage of 1.8-3.3 V, the output voltage of 1.2-1.8 V, and the load current of 1-50 mA. The presented converter benefits low complexity, high efficiency, and low ripple with a module-reuse scheme, which combines the error comparator with the peak-voltage one by using digital switches.

Original languageEnglish
Title of host publication2024 9th International Conference on Integrated Circuits and Microsystems, ICICM 2024
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages735-740
Number of pages6
ISBN (Electronic)9798331509453
DOIs
Publication statusPublished - 2024
Event9th International Conference on Integrated Circuits and Microsystems, ICICM 2024 - Wuhan, China
Duration: 25 Oct 202427 Oct 2024

Publication series

Name2024 9th International Conference on Integrated Circuits and Microsystems, ICICM 2024

Conference

Conference9th International Conference on Integrated Circuits and Microsystems, ICICM 2024
Country/TerritoryChina
CityWuhan
Period25/10/2427/10/24

Keywords

  • DC-DC converter
  • double-comparator
  • low complexity
  • low ripple
  • module-reuse

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