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A K-band low noise amplifier with on-chip baluns in 90nm CMOS

  • Zicheng Liu
  • , Peng Gao
  • , Zhiming Chen*
  • *Corresponding author for this work
  • Beijing Institute of Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a CMOS K-band low noise amplifier (LNA). Pseudo differential structure with on-chip balun has more advantages than single-end in system-on-chip (SOC) and so forth. In this design, two on-chip baluns are inserted in the LNA for single-in and single-out. Some inter-digital capacitors and a transformer are employed for matching to reduce the number of the inductors. The proposed LNA is fabricated in 90 nm CMOS process, achieved a gain of 20dB at 23.5 GHz, a 3-dB bandwidth of 2 GHz (from 22.7 to 24.7 GHz), and a noise figure of 3.6 dB with an input return loss of 17 dB, while consuming 16.5 mW with 1V power supply.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages241-243
Number of pages3
ISBN (Electronic)9781467377942
DOIs
Publication statusPublished - 8 Jan 2016
EventIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Sendai, Japan
Duration: 26 Aug 201528 Aug 2015

Publication series

Name2015 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015 - Proceedings

Conference

ConferenceIEEE International Symposium on Radio-Frequency Integration Technology, RFIT 2015
Country/TerritoryJapan
CitySendai
Period26/08/1528/08/15

Keywords

  • CMOS
  • K-band low noise amplifier
  • On-chip baluns
  • Pseudo differential

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