Abstract
Linear frequency-modulated pulse is one of the most important large time-bandwidth product signals, which demands large calculations for digital processing. In this paper, methods to improve parallelism of FFT calculation in VLIW architecture processor are studied, and a modified fixed-point FFT algorithm is promoted to meet the need of computation speed and accuracy. Then a high-speed real-time digital pulse compression system based on TMS320C6201 is realized, it can implement DPC processing within 124us, which is very close to the top performance of TMS320C6201. The whole system has been applied in some radar and proved stable and reliable.
| Original language | English |
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| Pages | 557-561 |
| Number of pages | 5 |
| Publication status | Published - 2001 |
| Event | 2001 CIE International Conference on Radar Proceedings - Beijing, China Duration: 15 Oct 2001 → 18 Oct 2001 |
Conference
| Conference | 2001 CIE International Conference on Radar Proceedings |
|---|---|
| Country/Territory | China |
| City | Beijing |
| Period | 15/10/01 → 18/10/01 |
Keywords
- Digital pulse compression
- FFT
- Linear frequency-modulated
- VLIW