A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs

  • Yunsong Tao*
  • , Yi Zhong*
  • , Jin Shao
  • , Changyou Men
  • , Lu Jie
  • , Nan Sun*
  • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This work proposes a dithered-digital-mixing background timing-skew calibration method for time-interleaved (TI) analog-to-digital converters (ADCs). Unlike prior digital-mixing methods that limit the input bandwidth or lead the calibration process to a limit cycle, the proposed method enhances the input bandwidth to the Nyquist frequency and guarantees the convergence. This is achieved by a pseudo-random binary sequence generator that produces a dither signal. Practical considerations including thermal noise and the step size of variable delay lines are discussed. Behavioral simulation results demonstrate the effectiveness of the proposed method with an improvement of signal-to-noise-and-distortion ratio from 26.3dB to 52.6dB for a 5GS/s 9b 16-channel TI ADC.

Original languageEnglish
Title of host publicationISCAS 2024 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350330991
DOIs
Publication statusPublished - 2024
Externally publishedYes
Event2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024 - Singapore, Singapore
Duration: 19 May 202422 May 2024

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Conference

Conference2024 IEEE International Symposium on Circuits and Systems, ISCAS 2024
Country/TerritorySingapore
CitySingapore
Period19/05/2422/05/24

Keywords

  • analog-to-digital converter
  • background calibration
  • digital-mixing
  • dither
  • mismatch
  • time-interleaved
  • timing-skew

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