A CPLD-based design of pre-processing circuit in navigation computer

Xuan Xiao; Mengyin Fu; Qingzhe Wang; Xin Yang

doi:10.1109/ISSCAA.2010.5632538

A CPLD-based design of pre-processing circuit in navigation computer

Xuan Xiao^*, Mengyin Fu, Qingzhe Wang, Xin Yang

^*Corresponding author for this work

School of Automation

Beijing Institute of Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.

Original language	English
Title of host publication	ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics
Pages	483-486
Number of pages	4
DOIs	https://doi.org/10.1109/ISSCAA.2010.5632538
Publication status	Published - 2010
Event	3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010 - Harbin, China Duration: 8 Jun 2010 → 10 Jun 2010

Publication series

Name	ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics

Conference

Conference	3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010
Country/Territory	China
City	Harbin
Period	8/06/10 → 10/06/10

Keywords

CPLD
Design
Preprocessing circuit

Access to Document

10.1109/ISSCAA.2010.5632538

Cite this

Xiao, X., Fu, M., Wang, Q., & Yang, X. (2010). A CPLD-based design of pre-processing circuit in navigation computer. In ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics (pp. 483-486). Article 5632538 (ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics). https://doi.org/10.1109/ISSCAA.2010.5632538

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title = "A CPLD-based design of pre-processing circuit in navigation computer",

abstract = "In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.",

keywords = "CPLD, Design, Preprocessing circuit",

author = "Xuan Xiao and Mengyin Fu and Qingzhe Wang and Xin Yang",

year = "2010",

doi = "10.1109/ISSCAA.2010.5632538",

language = "English",

isbn = "9781424460441",

series = "ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics",

pages = "483--486",

booktitle = "ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics",

note = "3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010 ; Conference date: 08-06-2010 Through 10-06-2010",

}

Xiao, X, Fu, M, Wang, Q & Yang, X 2010, A CPLD-based design of pre-processing circuit in navigation computer. in ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics., 5632538, ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics, pp. 483-486, 3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010, Harbin, China, 8/06/10. https://doi.org/10.1109/ISSCAA.2010.5632538

A CPLD-based design of pre-processing circuit in navigation computer. / Xiao, Xuan; Fu, Mengyin; Wang, Qingzhe et al.
ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics. 2010. p. 483-486 5632538 (ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A CPLD-based design of pre-processing circuit in navigation computer

AU - Xiao, Xuan

AU - Fu, Mengyin

AU - Wang, Qingzhe

AU - Yang, Xin

PY - 2010

Y1 - 2010

N2 - In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.

AB - In order to improve the processing speed of navigation computer, a CPLD-based design of preprocessing circuit is presented. The outputs of gyroscopes, accelerometers, odometer and GPS are pre-processed, and then exchanged with the signal processing circuit through a dual-port RAM. All the information pre-processing circuit is designed in the CPLD, which enables a more flexible using and simpler circuit composition.

KW - CPLD

KW - Design

KW - Preprocessing circuit

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U2 - 10.1109/ISSCAA.2010.5632538

DO - 10.1109/ISSCAA.2010.5632538

M3 - Conference contribution

AN - SCOPUS:79952136835

SN - 9781424460441

T3 - ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics

SP - 483

EP - 486

BT - ISSCAA2010 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics

T2 - 3rd International Symposium on Systems and Control in Aeronautics and Astronautics, ISSCAA2010

Y2 - 8 June 2010 through 10 June 2010

ER -

A CPLD-based design of pre-processing circuit in navigation computer

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Keywords

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