@inproceedings{81a29a578674466cb63b72c942ce3977,
title = "A 92.9dB-SNDR 178.2dB-FoMs SAR ADC with kT/C noise cancellation and FIA",
abstract = "When designing high resolution ADCs, SAR ADCs face limitations due to sampling kT / C noise. The input capacitor size has to be very large. This poses burdens for ADC driver, leading to huge power/area costs and design complexity. We introduce a SAR ADC with noise cancellation and FIA, a fully dynamic amplifier with high power efficiency. A 17-bit SAR ADC was fabricated using a 28 nm CMOS process with a 0.35 MHz bandwidth, achieving 92.9dB SNDR and 178.2dB FoMs in simulation.",
keywords = "ADC, FIA, noise cancellation, SAR",
author = "Zijie Gao and Yi Zhong and Lu Jie and Nan Sun",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 2024 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2024 ; Conference date: 25-10-2024 Through 27-10-2024",
year = "2024",
doi = "10.1109/ICTA64028.2024.10860492",
language = "English",
series = "2024 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2024",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "78--79",
booktitle = "2024 IEEE International Conference on Integrated Circuits, Technologies and Applications, ICTA 2024",
address = "United States",
}